释义 |
英语缩略词“ILP”经常作为“Instruction Level Parallelism”的缩写来使用,中文表示:“指令级并行”。本文将详细介绍英语缩写词ILP所代表英文单词,其对应的中文拼音、详细解释以及在英语中的流行度。此外,还有关于缩略词ILP的分类、应用领域及相关应用示例等。 “ILP”(“指令级并行)释义 - 英文缩写词:ILP
- 英文单词:Instruction Level Parallelism
- 缩写词中文简要解释:指令级并行
- 中文拼音:zhǐ lìng jí bìng xíng
- 缩写词流行度:4731
- 缩写词分类:Computing
- 缩写词领域:General
以上为Instruction Level Parallelism英文缩略词ILP的中文解释,以及该英文缩写在英语的流行度、分类和应用领域方面的信息。
英文缩略词ILP的扩展资料-
By analyzing factors impacting upon the embedded system performance, an embedded system design method based on thread ideas is used, performance is improved with instruction level parallelism.
通过分析影响嵌入式系统性能的主要因素,采用了基于线程概念的嵌入式系统并行设计方法,利用指令级并行(ILP)来改善系统性能。
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Newly-emerging high performance processors for intensive computing generally use distributed register files to support ALU array and to explore instruction level parallelism ( ILP ) by VLIW.
新一代面向密集计算的高性能处理器普遍采用分布式寄存器文件来支撑ALU阵列,并通过VLIW开发指令级并行(ILP)。
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Instruction scheduling is used to exploit the instruction level parallelism ( ILP ) inherent in program through reordering its instructions.
指令调度通过调整指令之间的顺序来提高指令级并行(ILP)度(ILP)。
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Several basic blocks could be merged into a hyperblock in predicated execution so that instructions could be scheduled on a larger scope and more instruction level parallelism could be extracted.
谓词执行技术能够将多个基本块合并为一个超块,扩大指令调度范围,开发更多的指令级并行(ILP)。
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The potential instruction level parallelism ( ILP ) of modern processors can only be delivered by compiler-Code generator is a suite of target processor specific optimization in a compilers back-end.
代码生成是编译器后端中直接针对目标处理机的优化阶段的集合,因而它是提高目标处理机指令级并行(ILP)的重要组成部分。
上述内容是“Instruction Level Parallelism”作为“ILP”的缩写,解释为“指令级并行”时的信息,以及英语缩略词ILP所代表的英文单词,其对应的中文拼音、详细解释以及在英语中的流行度和相关分类、应用领域及应用示例等。
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